Dec 19, 2013

Microprocessor Instruction Set



microprocessor-8085

The 8085 microprocessor instruction set may be classified into the subsequent 5 purposeful headings.

DATA TRANSFER INSTRUCTIONS

It comprises the directions that move Data between registers or between memories locations and registers. Altogether Data transfer operations the content of source register isn't altered. Therefore the info transfer is repetition operation.
Example: (1) Mov A,B (2) MVI C,45H

ARITHMETIC INSTRUCTIONS

It contains the direction, which accomplishes the addition, subtraction, increment or decrements operations. The flag conditions square measure altered once execution of associate instruction during this cluster.
Example: (1) ADD A,B (2) SUI B,05H

LOGICAL INSTRUCTIONS

The instruction that completes the logical operations like AND, OR, EXCLUSIVE OR, complement, compare and rotate instruction square measure classified below this caption. The flag conditions are altered once execution of associate instruction during this cluster.
Example: (1) ORA A (2) cuckoo B, 01H

BRANCHING INSTRUCTIONS: 

The instructions that are wont to transfer the program management from one memory location to a different memory location are classified below this caption.
Example: (1) decision (2) JMP 4100

MACHINE MANAGEMENT INSTRUCTIONS 

It takes account of the instruction associated with interrupts and also the instruction won’t to halt the program execution.
Example: (1) NOP (2)Finish
Every instruction of a program must treat a Data. The tactic of specifying the info to be functioned by the instruction is named Addressing.
The 8085 Microprocessor has the subsequent five differing kinds of addressing.
1.  Immediate Addressing
2.  Direct Addressing
3.  Register Addressing
4.  Register Indirect Addressing
5.  Implied Addressing

Immediate Addressing

In this mode, the info is laid out in the instruction itself. The information’s are going to be a vicinity of the program instruction.
Example: MVI B, 3EH - Move the data 3EH given within the instruction to B register; LXI SP, 2700H.

Direct Addressing

In this mode of operation, the address of the info is laid out in the instruction. The info is going to be in memory. During this addressing mode, the program directions and Data may be hold on in several memories.
Example: LDA 1050H - Load the info on the market in memory location 1050H in to accumulator; SHLD 3000H

Register Addressing

In register addressing mode, the order specifies the name of the register during which the info is accessible.
Example: MOV A, B - Move the content of B register to A register; SPHL; ADD C.

Register Indirect Addressing

In register indirect addressing mode, the instruction stipulates the name of the register during which the address of the info is accessible. Here the info is going to be in memory and also the address is going to be within the register combine.
Example: MOV A, M - The memory Data addressed by H L combine is rapt to A register. LDAX B.

Implied Addressing

In this mode, the instruction itself specifies the info to be operated.
Example: CMA - Complement the content of accumulator; RAL

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